The adoption of solid-state lighting is fueling market growth
for high-brightness LEDs. It’s a competitive market, and each manufacturer is
looking for the keys to greater light output at a lower cost. In recent years,
the most significant advance in cost per lumen has been the adoption of patterned
sapphire substrates. By etching a pattern onto the polished sapphire substrate,
total light extraction efficiency (LEE) can be increased by as much as 30 percent.
Sapphire
is the material used as a substrate in the vast majority of LED chips. Patterns
etched on the surface of the sapphire wafer can significantly increase the light
output of LEDs in two ways: (1) by encouraging lateral growth of the epitaxial
layers, thereby reducing epitaxial defect density and increasing the light emission
of the active quantum well layers, and (2) by reducing light loss, through creation
of a photon scattering effect that allows more of the light generated to escape.
| a. Schematics of light extraction | b. Effect of light escape cone expansion |
| Figure 1. PSS techniques scatter photons (a) and effectively expand the light escape cone (b), which can result in up to a 30 percent gain in light extraction efficiency. |
|
Generally, the patterns consist of shapes - cones, domes,
pyramids - created in a hexagonal pattern on the surface of the sapphire through
dry plasma etching. Pattern features may be 0.65 to 2 microns in height, and the
pitch (the distance between the centers of adjacent features) may be 1.5 to 3
microns. These pattern designs are developed independently by each of the LED
manufacturers to meet the needs of their unique epitaxial recipes and are considered
proprietary technology. Because of this, no standard library of patterns exist.
The critical dimensions to increasing LEE include the shape and size of the pattern
features and the aspect ratio - the ratio of height to width. Deeper patterns
tend to be associated with greater LEE, but can be difficult to make if conditions
are not well-controlled.
In addition to developing their PSS recipes in-house,
LED manufacturers originally performed the patterning operations themselves, with
most still conducting some of their patterning operations in-house. With third-party
patterning becoming more available in 2010 for two-inch wafers, and later four-inch
wafers, LED companies had the option of outsourcing at least a portion of their
patterning activity.
Concurrently with the development of patterned wafers,
LED chip manufacturers have been slowly migrating to larger substrates for greater
efficiency. Larger wafers provide several benefits, including increased throughput
for each reactor run, effectively increasing capacity without adding additional
MOCVD reactors or additional floor space; reduced edge loss; and reduced wafer
handling. In 2014 we have seen 4″ wafers overtake 2″ wafers as the predominant
wafer size in LED manufacturing, with industry leaders at the forefront using
6″ wafers. Although 6″ wafers are still in the minority, they are poised
to be the fastest-growing LED wafer category over the next few years.
The
yield for PSS at larger diameters is affected by the flatness of the wafer, and
bowing of the wafer can cause inconsistent etching and lower yields. Rubicon has
been successful with its introduction of larger diameter (that is, 4-, 6-, and
8-inch) PSS, largely because of the high quality of its crystal and extensive
large-diameter polishing experience. Other manufacturing challenges, such as dimensional
accuracy of the pattern and uniformity of the photoresist mask, have been addressed
through both the technology platform and process development.
What’s
next for PSS? Can we get even more luminous efficiency with this technology? Nanoscale
patterning has been extensively studied for its potential impact on light extraction
efficiency due to both its significantly increased pattern density and its impact
on internal quantum efficiency from the improvement of epitaxial quality. Indeed,
academic research indicates that nanoscale patterns could potentially boost light
output another 30 percent. High resolution optical lithography for nano PSS requires
a very high degree of substrate flatness which is a significant challenge for
current sapphire substrate suppliers. Figure 2 shows the SEM picture of 270nm
pitch nanoscale patterns created on a sapphire substrate through nano-imprinting
by Rubicon Technology Inc.
As we continue to test new patterns and sizes,
like nanoscale patterning, it is clear that the industry hasn’t reached a wall
in what is possible for light output. Further advances in PSS technology will
provide improvements in light extraction efficiency, contributing to the continued
market success of LED technology.
Figure 2. SEM
picture of nanoscale patterns with 270nm pitch created on a sapphire substrate
through nano-imprinting by Rubicon Technology Inc.
Akhtar Zaman is Senior Vice President, Quality and Supply Line Management at Rubicon Technology
